
spidev_test:     file format elf64-littleaarch64


Disassembly of section .init:

00000000004008e8 <_init>:
  4008e8:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4008ec:	910003fd 	mov	x29, sp
  4008f0:	9400006e 	bl	400aa8 <call_weak_fn>
  4008f4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4008f8:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400900 <.plt>:
  400900:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400904:	d0000090 	adrp	x16, 412000 <__FRAME_END__+0xfd68>
  400908:	f947fe11 	ldr	x17, [x16, #4088]
  40090c:	913fe210 	add	x16, x16, #0xff8
  400910:	d61f0220 	br	x17
  400914:	d503201f 	nop
  400918:	d503201f 	nop
  40091c:	d503201f 	nop

0000000000400920 <strlen@plt>:
  400920:	f0000090 	adrp	x16, 413000 <strlen@GLIBC_2.17>
  400924:	f9400211 	ldr	x17, [x16]
  400928:	91000210 	add	x16, x16, #0x0
  40092c:	d61f0220 	br	x17

0000000000400930 <exit@plt>:
  400930:	f0000090 	adrp	x16, 413000 <strlen@GLIBC_2.17>
  400934:	f9400611 	ldr	x17, [x16, #8]
  400938:	91002210 	add	x16, x16, #0x8
  40093c:	d61f0220 	br	x17

0000000000400940 <perror@plt>:
  400940:	f0000090 	adrp	x16, 413000 <strlen@GLIBC_2.17>
  400944:	f9400a11 	ldr	x17, [x16, #16]
  400948:	91004210 	add	x16, x16, #0x10
  40094c:	d61f0220 	br	x17

0000000000400950 <atoi@plt>:
  400950:	f0000090 	adrp	x16, 413000 <strlen@GLIBC_2.17>
  400954:	f9400e11 	ldr	x17, [x16, #24]
  400958:	91006210 	add	x16, x16, #0x18
  40095c:	d61f0220 	br	x17

0000000000400960 <malloc@plt>:
  400960:	f0000090 	adrp	x16, 413000 <strlen@GLIBC_2.17>
  400964:	f9401211 	ldr	x17, [x16, #32]
  400968:	91008210 	add	x16, x16, #0x20
  40096c:	d61f0220 	br	x17

0000000000400970 <open@plt>:
  400970:	f0000090 	adrp	x16, 413000 <strlen@GLIBC_2.17>
  400974:	f9401611 	ldr	x17, [x16, #40]
  400978:	9100a210 	add	x16, x16, #0x28
  40097c:	d61f0220 	br	x17

0000000000400980 <__libc_start_main@plt>:
  400980:	f0000090 	adrp	x16, 413000 <strlen@GLIBC_2.17>
  400984:	f9401a11 	ldr	x17, [x16, #48]
  400988:	9100c210 	add	x16, x16, #0x30
  40098c:	d61f0220 	br	x17

0000000000400990 <close@plt>:
  400990:	f0000090 	adrp	x16, 413000 <strlen@GLIBC_2.17>
  400994:	f9401e11 	ldr	x17, [x16, #56]
  400998:	9100e210 	add	x16, x16, #0x38
  40099c:	d61f0220 	br	x17

00000000004009a0 <__gmon_start__@plt>:
  4009a0:	f0000090 	adrp	x16, 413000 <strlen@GLIBC_2.17>
  4009a4:	f9402211 	ldr	x17, [x16, #64]
  4009a8:	91010210 	add	x16, x16, #0x40
  4009ac:	d61f0220 	br	x17

00000000004009b0 <write@plt>:
  4009b0:	f0000090 	adrp	x16, 413000 <strlen@GLIBC_2.17>
  4009b4:	f9402611 	ldr	x17, [x16, #72]
  4009b8:	91012210 	add	x16, x16, #0x48
  4009bc:	d61f0220 	br	x17

00000000004009c0 <abort@plt>:
  4009c0:	f0000090 	adrp	x16, 413000 <strlen@GLIBC_2.17>
  4009c4:	f9402a11 	ldr	x17, [x16, #80]
  4009c8:	91014210 	add	x16, x16, #0x50
  4009cc:	d61f0220 	br	x17

00000000004009d0 <puts@plt>:
  4009d0:	f0000090 	adrp	x16, 413000 <strlen@GLIBC_2.17>
  4009d4:	f9402e11 	ldr	x17, [x16, #88]
  4009d8:	91016210 	add	x16, x16, #0x58
  4009dc:	d61f0220 	br	x17

00000000004009e0 <getopt_long@plt>:
  4009e0:	f0000090 	adrp	x16, 413000 <strlen@GLIBC_2.17>
  4009e4:	f9403211 	ldr	x17, [x16, #96]
  4009e8:	91018210 	add	x16, x16, #0x60
  4009ec:	d61f0220 	br	x17

00000000004009f0 <free@plt>:
  4009f0:	f0000090 	adrp	x16, 413000 <strlen@GLIBC_2.17>
  4009f4:	f9403611 	ldr	x17, [x16, #104]
  4009f8:	9101a210 	add	x16, x16, #0x68
  4009fc:	d61f0220 	br	x17

0000000000400a00 <read@plt>:
  400a00:	f0000090 	adrp	x16, 413000 <strlen@GLIBC_2.17>
  400a04:	f9403a11 	ldr	x17, [x16, #112]
  400a08:	9101c210 	add	x16, x16, #0x70
  400a0c:	d61f0220 	br	x17

0000000000400a10 <__isoc99_sscanf@plt>:
  400a10:	f0000090 	adrp	x16, 413000 <strlen@GLIBC_2.17>
  400a14:	f9403e11 	ldr	x17, [x16, #120]
  400a18:	9101e210 	add	x16, x16, #0x78
  400a1c:	d61f0220 	br	x17

0000000000400a20 <printf@plt>:
  400a20:	f0000090 	adrp	x16, 413000 <strlen@GLIBC_2.17>
  400a24:	f9404211 	ldr	x17, [x16, #128]
  400a28:	91020210 	add	x16, x16, #0x80
  400a2c:	d61f0220 	br	x17

0000000000400a30 <putchar@plt>:
  400a30:	f0000090 	adrp	x16, 413000 <strlen@GLIBC_2.17>
  400a34:	f9404611 	ldr	x17, [x16, #136]
  400a38:	91022210 	add	x16, x16, #0x88
  400a3c:	d61f0220 	br	x17

0000000000400a40 <__xstat@plt>:
  400a40:	f0000090 	adrp	x16, 413000 <strlen@GLIBC_2.17>
  400a44:	f9404a11 	ldr	x17, [x16, #144]
  400a48:	91024210 	add	x16, x16, #0x90
  400a4c:	d61f0220 	br	x17

0000000000400a50 <ioctl@plt>:
  400a50:	f0000090 	adrp	x16, 413000 <strlen@GLIBC_2.17>
  400a54:	f9404e11 	ldr	x17, [x16, #152]
  400a58:	91026210 	add	x16, x16, #0x98
  400a5c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400a60 <_start>:
  400a60:	d280001d 	mov	x29, #0x0                   	// #0
  400a64:	d280001e 	mov	x30, #0x0                   	// #0
  400a68:	aa0003e5 	mov	x5, x0
  400a6c:	f94003e1 	ldr	x1, [sp]
  400a70:	910023e2 	add	x2, sp, #0x8
  400a74:	910003e6 	mov	x6, sp
  400a78:	580000c0 	ldr	x0, 400a90 <_start+0x30>
  400a7c:	580000e3 	ldr	x3, 400a98 <_start+0x38>
  400a80:	58000104 	ldr	x4, 400aa0 <_start+0x40>
  400a84:	97ffffbf 	bl	400980 <__libc_start_main@plt>
  400a88:	97ffffce 	bl	4009c0 <abort@plt>
  400a8c:	00000000 	.inst	0x00000000 ; undefined
  400a90:	004015c0 	.word	0x004015c0
  400a94:	00000000 	.word	0x00000000
  400a98:	004018a0 	.word	0x004018a0
  400a9c:	00000000 	.word	0x00000000
  400aa0:	00401920 	.word	0x00401920
  400aa4:	00000000 	.word	0x00000000

0000000000400aa8 <call_weak_fn>:
  400aa8:	d0000080 	adrp	x0, 412000 <__FRAME_END__+0xfd68>
  400aac:	f947f000 	ldr	x0, [x0, #4064]
  400ab0:	b4000040 	cbz	x0, 400ab8 <call_weak_fn+0x10>
  400ab4:	17ffffbb 	b	4009a0 <__gmon_start__@plt>
  400ab8:	d65f03c0 	ret
  400abc:	00000000 	.inst	0x00000000 ; undefined

0000000000400ac0 <deregister_tm_clones>:
  400ac0:	f0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  400ac4:	91038000 	add	x0, x0, #0xe0
  400ac8:	f0000081 	adrp	x1, 413000 <strlen@GLIBC_2.17>
  400acc:	91038021 	add	x1, x1, #0xe0
  400ad0:	eb00003f 	cmp	x1, x0
  400ad4:	540000a0 	b.eq	400ae8 <deregister_tm_clones+0x28>  // b.none
  400ad8:	b0000001 	adrp	x1, 401000 <transfer+0x1ec>
  400adc:	f944a821 	ldr	x1, [x1, #2384]
  400ae0:	b4000041 	cbz	x1, 400ae8 <deregister_tm_clones+0x28>
  400ae4:	d61f0020 	br	x1
  400ae8:	d65f03c0 	ret
  400aec:	d503201f 	nop

0000000000400af0 <register_tm_clones>:
  400af0:	f0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  400af4:	91038000 	add	x0, x0, #0xe0
  400af8:	f0000081 	adrp	x1, 413000 <strlen@GLIBC_2.17>
  400afc:	91038021 	add	x1, x1, #0xe0
  400b00:	cb000021 	sub	x1, x1, x0
  400b04:	9343fc21 	asr	x1, x1, #3
  400b08:	8b41fc21 	add	x1, x1, x1, lsr #63
  400b0c:	9341fc21 	asr	x1, x1, #1
  400b10:	b40000a1 	cbz	x1, 400b24 <register_tm_clones+0x34>
  400b14:	b0000002 	adrp	x2, 401000 <transfer+0x1ec>
  400b18:	f944ac42 	ldr	x2, [x2, #2392]
  400b1c:	b4000042 	cbz	x2, 400b24 <register_tm_clones+0x34>
  400b20:	d61f0040 	br	x2
  400b24:	d65f03c0 	ret

0000000000400b28 <__do_global_dtors_aux>:
  400b28:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400b2c:	910003fd 	mov	x29, sp
  400b30:	f9000bf3 	str	x19, [sp, #16]
  400b34:	f0000093 	adrp	x19, 413000 <strlen@GLIBC_2.17>
  400b38:	3943a260 	ldrb	w0, [x19, #232]
  400b3c:	35000080 	cbnz	w0, 400b4c <__do_global_dtors_aux+0x24>
  400b40:	97ffffe0 	bl	400ac0 <deregister_tm_clones>
  400b44:	52800020 	mov	w0, #0x1                   	// #1
  400b48:	3903a260 	strb	w0, [x19, #232]
  400b4c:	f9400bf3 	ldr	x19, [sp, #16]
  400b50:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400b54:	d65f03c0 	ret

0000000000400b58 <frame_dummy>:
  400b58:	17ffffe6 	b	400af0 <register_tm_clones>

0000000000400b5c <pabort>:
  400b5c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400b60:	910003fd 	mov	x29, sp
  400b64:	f9000fa0 	str	x0, [x29, #24]
  400b68:	f9400fa0 	ldr	x0, [x29, #24]
  400b6c:	97ffff75 	bl	400940 <perror@plt>
  400b70:	97ffff94 	bl	4009c0 <abort@plt>

0000000000400b74 <hex_dump>:
  400b74:	a9bb7bfd 	stp	x29, x30, [sp, #-80]!
  400b78:	910003fd 	mov	x29, sp
  400b7c:	f90017a0 	str	x0, [x29, #40]
  400b80:	f90013a1 	str	x1, [x29, #32]
  400b84:	f9000fa2 	str	x2, [x29, #24]
  400b88:	f9000ba3 	str	x3, [x29, #16]
  400b8c:	b9004fbf 	str	wzr, [x29, #76]
  400b90:	f94017a0 	ldr	x0, [x29, #40]
  400b94:	f90023a0 	str	x0, [x29, #64]
  400b98:	f94023a0 	ldr	x0, [x29, #64]
  400b9c:	f9001fa0 	str	x0, [x29, #56]
  400ba0:	b0000000 	adrp	x0, 401000 <transfer+0x1ec>
  400ba4:	9125c000 	add	x0, x0, #0x970
  400ba8:	f9400ba1 	ldr	x1, [x29, #16]
  400bac:	97ffff9d 	bl	400a20 <printf@plt>
  400bb0:	14000051 	b	400cf4 <hex_dump+0x180>
  400bb4:	f94023a0 	ldr	x0, [x29, #64]
  400bb8:	91000401 	add	x1, x0, #0x1
  400bbc:	f90023a1 	str	x1, [x29, #64]
  400bc0:	39400000 	ldrb	w0, [x0]
  400bc4:	2a0003e1 	mov	w1, w0
  400bc8:	b0000000 	adrp	x0, 401000 <transfer+0x1ec>
  400bcc:	9125e000 	add	x0, x0, #0x978
  400bd0:	97ffff94 	bl	400a20 <printf@plt>
  400bd4:	b9404fa0 	ldr	w0, [x29, #76]
  400bd8:	11000400 	add	w0, w0, #0x1
  400bdc:	b9004fa0 	str	w0, [x29, #76]
  400be0:	b9804fa0 	ldrsw	x0, [x29, #76]
  400be4:	f9400fa1 	ldr	x1, [x29, #24]
  400be8:	9ac10802 	udiv	x2, x0, x1
  400bec:	f9400fa1 	ldr	x1, [x29, #24]
  400bf0:	9b017c41 	mul	x1, x2, x1
  400bf4:	cb010000 	sub	x0, x0, x1
  400bf8:	f100001f 	cmp	x0, #0x0
  400bfc:	54000180 	b.eq	400c2c <hex_dump+0xb8>  // b.none
  400c00:	f94013a0 	ldr	x0, [x29, #32]
  400c04:	f100001f 	cmp	x0, #0x0
  400c08:	54000761 	b.ne	400cf4 <hex_dump+0x180>  // b.any
  400c0c:	b9804fa0 	ldrsw	x0, [x29, #76]
  400c10:	f9400fa1 	ldr	x1, [x29, #24]
  400c14:	9ac10802 	udiv	x2, x0, x1
  400c18:	f9400fa1 	ldr	x1, [x29, #24]
  400c1c:	9b017c41 	mul	x1, x2, x1
  400c20:	cb010000 	sub	x0, x0, x1
  400c24:	f100001f 	cmp	x0, #0x0
  400c28:	54000660 	b.eq	400cf4 <hex_dump+0x180>  // b.none
  400c2c:	f94013a0 	ldr	x0, [x29, #32]
  400c30:	f100001f 	cmp	x0, #0x0
  400c34:	54000201 	b.ne	400c74 <hex_dump+0x100>  // b.any
  400c38:	14000004 	b	400c48 <hex_dump+0xd4>
  400c3c:	b0000000 	adrp	x0, 401000 <transfer+0x1ec>
  400c40:	91260000 	add	x0, x0, #0x980
  400c44:	97ffff77 	bl	400a20 <printf@plt>
  400c48:	b9404fa0 	ldr	w0, [x29, #76]
  400c4c:	11000401 	add	w1, w0, #0x1
  400c50:	b9004fa1 	str	w1, [x29, #76]
  400c54:	93407c00 	sxtw	x0, w0
  400c58:	f9400fa1 	ldr	x1, [x29, #24]
  400c5c:	9ac10802 	udiv	x2, x0, x1
  400c60:	f9400fa1 	ldr	x1, [x29, #24]
  400c64:	9b017c41 	mul	x1, x2, x1
  400c68:	cb010000 	sub	x0, x0, x1
  400c6c:	f100001f 	cmp	x0, #0x0
  400c70:	54fffe61 	b.ne	400c3c <hex_dump+0xc8>  // b.any
  400c74:	b0000000 	adrp	x0, 401000 <transfer+0x1ec>
  400c78:	91262000 	add	x0, x0, #0x988
  400c7c:	97ffff69 	bl	400a20 <printf@plt>
  400c80:	14000010 	b	400cc0 <hex_dump+0x14c>
  400c84:	f9401fa0 	ldr	x0, [x29, #56]
  400c88:	91000401 	add	x1, x0, #0x1
  400c8c:	f9001fa1 	str	x1, [x29, #56]
  400c90:	39400000 	ldrb	w0, [x0]
  400c94:	3900dfa0 	strb	w0, [x29, #55]
  400c98:	3940dfa0 	ldrb	w0, [x29, #55]
  400c9c:	7100801f 	cmp	w0, #0x20
  400ca0:	540000c9 	b.ls	400cb8 <hex_dump+0x144>  // b.plast
  400ca4:	3940dfa0 	ldrb	w0, [x29, #55]
  400ca8:	7103fc1f 	cmp	w0, #0xff
  400cac:	54000060 	b.eq	400cb8 <hex_dump+0x144>  // b.none
  400cb0:	3940dfa0 	ldrb	w0, [x29, #55]
  400cb4:	14000002 	b	400cbc <hex_dump+0x148>
  400cb8:	528005c0 	mov	w0, #0x2e                  	// #46
  400cbc:	97ffff5d 	bl	400a30 <putchar@plt>
  400cc0:	f9401fa1 	ldr	x1, [x29, #56]
  400cc4:	f94023a0 	ldr	x0, [x29, #64]
  400cc8:	eb00003f 	cmp	x1, x0
  400ccc:	54fffdc3 	b.cc	400c84 <hex_dump+0x110>  // b.lo, b.ul, b.last
  400cd0:	52800140 	mov	w0, #0xa                   	// #10
  400cd4:	97ffff57 	bl	400a30 <putchar@plt>
  400cd8:	f94013a0 	ldr	x0, [x29, #32]
  400cdc:	f100001f 	cmp	x0, #0x0
  400ce0:	540000a0 	b.eq	400cf4 <hex_dump+0x180>  // b.none
  400ce4:	b0000000 	adrp	x0, 401000 <transfer+0x1ec>
  400ce8:	9125c000 	add	x0, x0, #0x970
  400cec:	f9400ba1 	ldr	x1, [x29, #16]
  400cf0:	97ffff4c 	bl	400a20 <printf@plt>
  400cf4:	f94013a0 	ldr	x0, [x29, #32]
  400cf8:	d1000401 	sub	x1, x0, #0x1
  400cfc:	f90013a1 	str	x1, [x29, #32]
  400d00:	f100001f 	cmp	x0, #0x0
  400d04:	54fff581 	b.ne	400bb4 <hex_dump+0x40>  // b.any
  400d08:	d503201f 	nop
  400d0c:	a8c57bfd 	ldp	x29, x30, [sp], #80
  400d10:	d65f03c0 	ret

0000000000400d14 <unescape>:
  400d14:	a9bb7bfd 	stp	x29, x30, [sp, #-80]!
  400d18:	910003fd 	mov	x29, sp
  400d1c:	f90017a0 	str	x0, [x29, #40]
  400d20:	f90013a1 	str	x1, [x29, #32]
  400d24:	f9000fa2 	str	x2, [x29, #24]
  400d28:	b9004fbf 	str	wzr, [x29, #76]
  400d2c:	f94013a0 	ldr	x0, [x29, #32]
  400d30:	f90023a0 	str	x0, [x29, #64]
  400d34:	f94017a0 	ldr	x0, [x29, #40]
  400d38:	f9001fa0 	str	x0, [x29, #56]
  400d3c:	1400002f 	b	400df8 <unescape+0xe4>
  400d40:	f94023a0 	ldr	x0, [x29, #64]
  400d44:	39400000 	ldrb	w0, [x0]
  400d48:	7101701f 	cmp	w0, #0x5c
  400d4c:	54000401 	b.ne	400dcc <unescape+0xb8>  // b.any
  400d50:	f94023a0 	ldr	x0, [x29, #64]
  400d54:	91000400 	add	x0, x0, #0x1
  400d58:	39400000 	ldrb	w0, [x0]
  400d5c:	7101e01f 	cmp	w0, #0x78
  400d60:	54000361 	b.ne	400dcc <unescape+0xb8>  // b.any
  400d64:	f94023a0 	ldr	x0, [x29, #64]
  400d68:	91000803 	add	x3, x0, #0x2
  400d6c:	9100c3a1 	add	x1, x29, #0x30
  400d70:	b0000000 	adrp	x0, 401000 <transfer+0x1ec>
  400d74:	91264000 	add	x0, x0, #0x990
  400d78:	aa0103e2 	mov	x2, x1
  400d7c:	aa0003e1 	mov	x1, x0
  400d80:	aa0303e0 	mov	x0, x3
  400d84:	97ffff23 	bl	400a10 <__isoc99_sscanf@plt>
  400d88:	b90037a0 	str	w0, [x29, #52]
  400d8c:	b94037a0 	ldr	w0, [x29, #52]
  400d90:	7100001f 	cmp	w0, #0x0
  400d94:	54000081 	b.ne	400da4 <unescape+0x90>  // b.any
  400d98:	b0000000 	adrp	x0, 401000 <transfer+0x1ec>
  400d9c:	91266000 	add	x0, x0, #0x998
  400da0:	97ffff6f 	bl	400b5c <pabort>
  400da4:	f94023a0 	ldr	x0, [x29, #64]
  400da8:	91001000 	add	x0, x0, #0x4
  400dac:	f90023a0 	str	x0, [x29, #64]
  400db0:	b94033a2 	ldr	w2, [x29, #48]
  400db4:	f9401fa0 	ldr	x0, [x29, #56]
  400db8:	91000401 	add	x1, x0, #0x1
  400dbc:	f9001fa1 	str	x1, [x29, #56]
  400dc0:	12001c41 	and	w1, w2, #0xff
  400dc4:	39000001 	strb	w1, [x0]
  400dc8:	14000009 	b	400dec <unescape+0xd8>
  400dcc:	f94023a1 	ldr	x1, [x29, #64]
  400dd0:	91000420 	add	x0, x1, #0x1
  400dd4:	f90023a0 	str	x0, [x29, #64]
  400dd8:	f9401fa0 	ldr	x0, [x29, #56]
  400ddc:	91000402 	add	x2, x0, #0x1
  400de0:	f9001fa2 	str	x2, [x29, #56]
  400de4:	39400021 	ldrb	w1, [x1]
  400de8:	39000001 	strb	w1, [x0]
  400dec:	b9404fa0 	ldr	w0, [x29, #76]
  400df0:	11000400 	add	w0, w0, #0x1
  400df4:	b9004fa0 	str	w0, [x29, #76]
  400df8:	f94023a0 	ldr	x0, [x29, #64]
  400dfc:	39400000 	ldrb	w0, [x0]
  400e00:	7100001f 	cmp	w0, #0x0
  400e04:	54fff9e1 	b.ne	400d40 <unescape+0x2c>  // b.any
  400e08:	b9404fa0 	ldr	w0, [x29, #76]
  400e0c:	a8c57bfd 	ldp	x29, x30, [sp], #80
  400e10:	d65f03c0 	ret

0000000000400e14 <transfer>:
  400e14:	a9ba7bfd 	stp	x29, x30, [sp, #-96]!
  400e18:	910003fd 	mov	x29, sp
  400e1c:	b9002fa0 	str	w0, [x29, #44]
  400e20:	f90013a1 	str	x1, [x29, #32]
  400e24:	f9000fa2 	str	x2, [x29, #24]
  400e28:	f9000ba3 	str	x3, [x29, #16]
  400e2c:	a903ffbf 	stp	xzr, xzr, [x29, #56]
  400e30:	a904ffbf 	stp	xzr, xzr, [x29, #72]
  400e34:	f94013a0 	ldr	x0, [x29, #32]
  400e38:	f9001fa0 	str	x0, [x29, #56]
  400e3c:	f9400fa0 	ldr	x0, [x29, #24]
  400e40:	f90023a0 	str	x0, [x29, #64]
  400e44:	f9400ba0 	ldr	x0, [x29, #16]
  400e48:	b9004ba0 	str	w0, [x29, #72]
  400e4c:	f0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  400e50:	9102f000 	add	x0, x0, #0xbc
  400e54:	b9400000 	ldr	w0, [x0]
  400e58:	b9004fa0 	str	w0, [x29, #76]
  400e5c:	f0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  400e60:	9104a000 	add	x0, x0, #0x128
  400e64:	79400000 	ldrh	w0, [x0]
  400e68:	7900a3a0 	strh	w0, [x29, #80]
  400e6c:	f0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  400e70:	9102e000 	add	x0, x0, #0xb8
  400e74:	39400000 	ldrb	w0, [x0]
  400e78:	39014ba0 	strb	w0, [x29, #82]
  400e7c:	f0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  400e80:	91044000 	add	x0, x0, #0x110
  400e84:	b9400000 	ldr	w0, [x0]
  400e88:	12170000 	and	w0, w0, #0x200
  400e8c:	7100001f 	cmp	w0, #0x0
  400e90:	54000080 	b.eq	400ea0 <transfer+0x8c>  // b.none
  400e94:	52800080 	mov	w0, #0x4                   	// #4
  400e98:	390153a0 	strb	w0, [x29, #84]
  400e9c:	14000009 	b	400ec0 <transfer+0xac>
  400ea0:	f0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  400ea4:	91044000 	add	x0, x0, #0x110
  400ea8:	b9400000 	ldr	w0, [x0]
  400eac:	12180000 	and	w0, w0, #0x100
  400eb0:	7100001f 	cmp	w0, #0x0
  400eb4:	54000060 	b.eq	400ec0 <transfer+0xac>  // b.none
  400eb8:	52800040 	mov	w0, #0x2                   	// #2
  400ebc:	390153a0 	strb	w0, [x29, #84]
  400ec0:	f0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  400ec4:	91044000 	add	x0, x0, #0x110
  400ec8:	b9400000 	ldr	w0, [x0]
  400ecc:	12150000 	and	w0, w0, #0x800
  400ed0:	7100001f 	cmp	w0, #0x0
  400ed4:	54000080 	b.eq	400ee4 <transfer+0xd0>  // b.none
  400ed8:	52800080 	mov	w0, #0x4                   	// #4
  400edc:	390157a0 	strb	w0, [x29, #85]
  400ee0:	14000009 	b	400f04 <transfer+0xf0>
  400ee4:	f0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  400ee8:	91044000 	add	x0, x0, #0x110
  400eec:	b9400000 	ldr	w0, [x0]
  400ef0:	12160000 	and	w0, w0, #0x400
  400ef4:	7100001f 	cmp	w0, #0x0
  400ef8:	54000060 	b.eq	400f04 <transfer+0xf0>  // b.none
  400efc:	52800040 	mov	w0, #0x2                   	// #2
  400f00:	390157a0 	strb	w0, [x29, #85]
  400f04:	f0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  400f08:	91044000 	add	x0, x0, #0x110
  400f0c:	b9400000 	ldr	w0, [x0]
  400f10:	121b0000 	and	w0, w0, #0x20
  400f14:	7100001f 	cmp	w0, #0x0
  400f18:	54000201 	b.ne	400f58 <transfer+0x144>  // b.any
  400f1c:	f0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  400f20:	91044000 	add	x0, x0, #0x110
  400f24:	b9400000 	ldr	w0, [x0]
  400f28:	12180400 	and	w0, w0, #0x300
  400f2c:	7100001f 	cmp	w0, #0x0
  400f30:	54000060 	b.eq	400f3c <transfer+0x128>  // b.none
  400f34:	f90023bf 	str	xzr, [x29, #64]
  400f38:	14000008 	b	400f58 <transfer+0x144>
  400f3c:	f0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  400f40:	91044000 	add	x0, x0, #0x110
  400f44:	b9400000 	ldr	w0, [x0]
  400f48:	12160400 	and	w0, w0, #0xc00
  400f4c:	7100001f 	cmp	w0, #0x0
  400f50:	54000040 	b.eq	400f58 <transfer+0x144>  // b.none
  400f54:	f9001fbf 	str	xzr, [x29, #56]
  400f58:	9100e3a0 	add	x0, x29, #0x38
  400f5c:	aa0003e2 	mov	x2, x0
  400f60:	d28d6001 	mov	x1, #0x6b00                	// #27392
  400f64:	f2a80401 	movk	x1, #0x4020, lsl #16
  400f68:	b9402fa0 	ldr	w0, [x29, #44]
  400f6c:	97fffeb9 	bl	400a50 <ioctl@plt>
  400f70:	b9005fa0 	str	w0, [x29, #92]
  400f74:	b9405fa0 	ldr	w0, [x29, #92]
  400f78:	7100001f 	cmp	w0, #0x0
  400f7c:	5400008c 	b.gt	400f8c <transfer+0x178>
  400f80:	b0000000 	adrp	x0, 401000 <transfer+0x1ec>
  400f84:	9126c000 	add	x0, x0, #0x9b0
  400f88:	97fffef5 	bl	400b5c <pabort>
  400f8c:	f0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  400f90:	9104b000 	add	x0, x0, #0x12c
  400f94:	b9400000 	ldr	w0, [x0]
  400f98:	7100001f 	cmp	w0, #0x0
  400f9c:	54000100 	b.eq	400fbc <transfer+0x1a8>  // b.none
  400fa0:	b0000000 	adrp	x0, 401000 <transfer+0x1ec>
  400fa4:	91272000 	add	x0, x0, #0x9c8
  400fa8:	aa0003e3 	mov	x3, x0
  400fac:	d2800402 	mov	x2, #0x20                  	// #32
  400fb0:	f9400ba1 	ldr	x1, [x29, #16]
  400fb4:	f94013a0 	ldr	x0, [x29, #32]
  400fb8:	97fffeef 	bl	400b74 <hex_dump>
  400fbc:	f0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  400fc0:	91048000 	add	x0, x0, #0x120
  400fc4:	f9400000 	ldr	x0, [x0]
  400fc8:	f100001f 	cmp	x0, #0x0
  400fcc:	54000380 	b.eq	40103c <transfer+0x228>  // b.none
  400fd0:	f0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  400fd4:	91048000 	add	x0, x0, #0x120
  400fd8:	f9400000 	ldr	x0, [x0]
  400fdc:	528036c2 	mov	w2, #0x1b6                 	// #438
  400fe0:	52804821 	mov	w1, #0x241                 	// #577
  400fe4:	97fffe63 	bl	400970 <open@plt>
  400fe8:	b9005ba0 	str	w0, [x29, #88]
  400fec:	b9405ba0 	ldr	w0, [x29, #88]
  400ff0:	7100001f 	cmp	w0, #0x0
  400ff4:	5400008a 	b.ge	401004 <transfer+0x1f0>  // b.tcont
  400ff8:	b0000000 	adrp	x0, 401000 <transfer+0x1ec>
  400ffc:	91274000 	add	x0, x0, #0x9d0
  401000:	97fffed7 	bl	400b5c <pabort>
  401004:	f9400ba2 	ldr	x2, [x29, #16]
  401008:	f9400fa1 	ldr	x1, [x29, #24]
  40100c:	b9405ba0 	ldr	w0, [x29, #88]
  401010:	97fffe68 	bl	4009b0 <write@plt>
  401014:	b9005fa0 	str	w0, [x29, #92]
  401018:	b9805fa0 	ldrsw	x0, [x29, #92]
  40101c:	f9400ba1 	ldr	x1, [x29, #16]
  401020:	eb00003f 	cmp	x1, x0
  401024:	54000080 	b.eq	401034 <transfer+0x220>  // b.none
  401028:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  40102c:	9127c000 	add	x0, x0, #0x9f0
  401030:	97fffecb 	bl	400b5c <pabort>
  401034:	b9405ba0 	ldr	w0, [x29, #88]
  401038:	97fffe56 	bl	400990 <close@plt>
  40103c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401040:	9104b000 	add	x0, x0, #0x12c
  401044:	b9400000 	ldr	w0, [x0]
  401048:	7100001f 	cmp	w0, #0x0
  40104c:	540000c1 	b.ne	401064 <transfer+0x250>  // b.any
  401050:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401054:	91048000 	add	x0, x0, #0x120
  401058:	f9400000 	ldr	x0, [x0]
  40105c:	f100001f 	cmp	x0, #0x0
  401060:	54000101 	b.ne	401080 <transfer+0x26c>  // b.any
  401064:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  401068:	91286000 	add	x0, x0, #0xa18
  40106c:	aa0003e3 	mov	x3, x0
  401070:	d2800402 	mov	x2, #0x20                  	// #32
  401074:	f9400ba1 	ldr	x1, [x29, #16]
  401078:	f9400fa0 	ldr	x0, [x29, #24]
  40107c:	97fffebe 	bl	400b74 <hex_dump>
  401080:	d503201f 	nop
  401084:	a8c67bfd 	ldp	x29, x30, [sp], #96
  401088:	d65f03c0 	ret

000000000040108c <print_usage>:
  40108c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  401090:	910003fd 	mov	x29, sp
  401094:	f9000fa0 	str	x0, [x29, #24]
  401098:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  40109c:	91288000 	add	x0, x0, #0xa20
  4010a0:	f9400fa1 	ldr	x1, [x29, #24]
  4010a4:	97fffe5f 	bl	400a20 <printf@plt>
  4010a8:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  4010ac:	91290000 	add	x0, x0, #0xa40
  4010b0:	97fffe48 	bl	4009d0 <puts@plt>
  4010b4:	52800020 	mov	w0, #0x1                   	// #1
  4010b8:	97fffe1e 	bl	400930 <exit@plt>

00000000004010bc <parse_opts>:
  4010bc:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  4010c0:	910003fd 	mov	x29, sp
  4010c4:	b9001fa0 	str	w0, [x29, #28]
  4010c8:	f9000ba1 	str	x1, [x29, #16]
  4010cc:	b0000000 	adrp	x0, 402000 <_IO_stdin_used+0x6b8>
  4010d0:	91016001 	add	x1, x0, #0x58
  4010d4:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  4010d8:	9133c000 	add	x0, x0, #0xcf0
  4010dc:	d2800004 	mov	x4, #0x0                   	// #0
  4010e0:	aa0103e3 	mov	x3, x1
  4010e4:	aa0003e2 	mov	x2, x0
  4010e8:	f9400ba1 	ldr	x1, [x29, #16]
  4010ec:	b9401fa0 	ldr	w0, [x29, #28]
  4010f0:	97fffe3c 	bl	4009e0 <getopt_long@plt>
  4010f4:	b9002fa0 	str	w0, [x29, #44]
  4010f8:	b9402fa0 	ldr	w0, [x29, #44]
  4010fc:	3100041f 	cmn	w0, #0x1
  401100:	54001380 	b.eq	401370 <parse_opts+0x2b4>  // b.none
  401104:	b9402fa0 	ldr	w0, [x29, #44]
  401108:	5100c800 	sub	w0, w0, #0x32
  40110c:	7101101f 	cmp	w0, #0x44
  401110:	54001268 	b.hi	40135c <parse_opts+0x2a0>  // b.pmore
  401114:	90000001 	adrp	x1, 401000 <transfer+0x1ec>
  401118:	91343021 	add	x1, x1, #0xd0c
  40111c:	b8605820 	ldr	w0, [x1, w0, uxtw #2]
  401120:	10000061 	adr	x1, 40112c <parse_opts+0x70>
  401124:	8b20c820 	add	x0, x1, w0, sxtw #2
  401128:	d61f0000 	br	x0
  40112c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401130:	91038000 	add	x0, x0, #0xe0
  401134:	f9400001 	ldr	x1, [x0]
  401138:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  40113c:	9102c000 	add	x0, x0, #0xb0
  401140:	f9000001 	str	x1, [x0]
  401144:	1400008a 	b	40136c <parse_opts+0x2b0>
  401148:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  40114c:	91038000 	add	x0, x0, #0xe0
  401150:	f9400000 	ldr	x0, [x0]
  401154:	97fffdff 	bl	400950 <atoi@plt>
  401158:	2a0003e1 	mov	w1, w0
  40115c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401160:	9102f000 	add	x0, x0, #0xbc
  401164:	b9000001 	str	w1, [x0]
  401168:	14000081 	b	40136c <parse_opts+0x2b0>
  40116c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401170:	91038000 	add	x0, x0, #0xe0
  401174:	f9400000 	ldr	x0, [x0]
  401178:	97fffdf6 	bl	400950 <atoi@plt>
  40117c:	12003c01 	and	w1, w0, #0xffff
  401180:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401184:	9104a000 	add	x0, x0, #0x128
  401188:	79000001 	strh	w1, [x0]
  40118c:	14000078 	b	40136c <parse_opts+0x2b0>
  401190:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401194:	91038000 	add	x0, x0, #0xe0
  401198:	f9400000 	ldr	x0, [x0]
  40119c:	97fffded 	bl	400950 <atoi@plt>
  4011a0:	12001c01 	and	w1, w0, #0xff
  4011a4:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4011a8:	9102e000 	add	x0, x0, #0xb8
  4011ac:	39000001 	strb	w1, [x0]
  4011b0:	1400006f 	b	40136c <parse_opts+0x2b0>
  4011b4:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4011b8:	91038000 	add	x0, x0, #0xe0
  4011bc:	f9400001 	ldr	x1, [x0]
  4011c0:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4011c4:	91046000 	add	x0, x0, #0x118
  4011c8:	f9000001 	str	x1, [x0]
  4011cc:	14000068 	b	40136c <parse_opts+0x2b0>
  4011d0:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4011d4:	91038000 	add	x0, x0, #0xe0
  4011d8:	f9400001 	ldr	x1, [x0]
  4011dc:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4011e0:	91048000 	add	x0, x0, #0x120
  4011e4:	f9000001 	str	x1, [x0]
  4011e8:	14000061 	b	40136c <parse_opts+0x2b0>
  4011ec:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4011f0:	91044000 	add	x0, x0, #0x110
  4011f4:	b9400000 	ldr	w0, [x0]
  4011f8:	321b0001 	orr	w1, w0, #0x20
  4011fc:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401200:	91044000 	add	x0, x0, #0x110
  401204:	b9000001 	str	w1, [x0]
  401208:	14000059 	b	40136c <parse_opts+0x2b0>
  40120c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401210:	91044000 	add	x0, x0, #0x110
  401214:	b9400000 	ldr	w0, [x0]
  401218:	32000001 	orr	w1, w0, #0x1
  40121c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401220:	91044000 	add	x0, x0, #0x110
  401224:	b9000001 	str	w1, [x0]
  401228:	14000051 	b	40136c <parse_opts+0x2b0>
  40122c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401230:	91044000 	add	x0, x0, #0x110
  401234:	b9400000 	ldr	w0, [x0]
  401238:	321f0001 	orr	w1, w0, #0x2
  40123c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401240:	91044000 	add	x0, x0, #0x110
  401244:	b9000001 	str	w1, [x0]
  401248:	14000049 	b	40136c <parse_opts+0x2b0>
  40124c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401250:	91044000 	add	x0, x0, #0x110
  401254:	b9400000 	ldr	w0, [x0]
  401258:	321d0001 	orr	w1, w0, #0x8
  40125c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401260:	91044000 	add	x0, x0, #0x110
  401264:	b9000001 	str	w1, [x0]
  401268:	14000041 	b	40136c <parse_opts+0x2b0>
  40126c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401270:	91044000 	add	x0, x0, #0x110
  401274:	b9400000 	ldr	w0, [x0]
  401278:	321e0001 	orr	w1, w0, #0x4
  40127c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401280:	91044000 	add	x0, x0, #0x110
  401284:	b9000001 	str	w1, [x0]
  401288:	14000039 	b	40136c <parse_opts+0x2b0>
  40128c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401290:	91044000 	add	x0, x0, #0x110
  401294:	b9400000 	ldr	w0, [x0]
  401298:	321c0001 	orr	w1, w0, #0x10
  40129c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4012a0:	91044000 	add	x0, x0, #0x110
  4012a4:	b9000001 	str	w1, [x0]
  4012a8:	14000031 	b	40136c <parse_opts+0x2b0>
  4012ac:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4012b0:	91044000 	add	x0, x0, #0x110
  4012b4:	b9400000 	ldr	w0, [x0]
  4012b8:	321a0001 	orr	w1, w0, #0x40
  4012bc:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4012c0:	91044000 	add	x0, x0, #0x110
  4012c4:	b9000001 	str	w1, [x0]
  4012c8:	14000029 	b	40136c <parse_opts+0x2b0>
  4012cc:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4012d0:	9104b000 	add	x0, x0, #0x12c
  4012d4:	52800021 	mov	w1, #0x1                   	// #1
  4012d8:	b9000001 	str	w1, [x0]
  4012dc:	14000024 	b	40136c <parse_opts+0x2b0>
  4012e0:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4012e4:	91044000 	add	x0, x0, #0x110
  4012e8:	b9400000 	ldr	w0, [x0]
  4012ec:	32190001 	orr	w1, w0, #0x80
  4012f0:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4012f4:	91044000 	add	x0, x0, #0x110
  4012f8:	b9000001 	str	w1, [x0]
  4012fc:	1400001c 	b	40136c <parse_opts+0x2b0>
  401300:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401304:	91038000 	add	x0, x0, #0xe0
  401308:	f9400001 	ldr	x1, [x0]
  40130c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401310:	9104c000 	add	x0, x0, #0x130
  401314:	f9000001 	str	x1, [x0]
  401318:	14000015 	b	40136c <parse_opts+0x2b0>
  40131c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401320:	91044000 	add	x0, x0, #0x110
  401324:	b9400000 	ldr	w0, [x0]
  401328:	32180001 	orr	w1, w0, #0x100
  40132c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401330:	91044000 	add	x0, x0, #0x110
  401334:	b9000001 	str	w1, [x0]
  401338:	1400000d 	b	40136c <parse_opts+0x2b0>
  40133c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401340:	91044000 	add	x0, x0, #0x110
  401344:	b9400000 	ldr	w0, [x0]
  401348:	32170001 	orr	w1, w0, #0x200
  40134c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401350:	91044000 	add	x0, x0, #0x110
  401354:	b9000001 	str	w1, [x0]
  401358:	14000005 	b	40136c <parse_opts+0x2b0>
  40135c:	f9400ba0 	ldr	x0, [x29, #16]
  401360:	f9400000 	ldr	x0, [x0]
  401364:	97ffff4a 	bl	40108c <print_usage>
  401368:	d503201f 	nop
  40136c:	17ffff58 	b	4010cc <parse_opts+0x10>
  401370:	d503201f 	nop
  401374:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401378:	91044000 	add	x0, x0, #0x110
  40137c:	b9400000 	ldr	w0, [x0]
  401380:	121b0000 	and	w0, w0, #0x20
  401384:	7100001f 	cmp	w0, #0x0
  401388:	54000360 	b.eq	4013f4 <parse_opts+0x338>  // b.none
  40138c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401390:	91044000 	add	x0, x0, #0x110
  401394:	b9400000 	ldr	w0, [x0]
  401398:	12180000 	and	w0, w0, #0x100
  40139c:	7100001f 	cmp	w0, #0x0
  4013a0:	54000100 	b.eq	4013c0 <parse_opts+0x304>  // b.none
  4013a4:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4013a8:	91044000 	add	x0, x0, #0x110
  4013ac:	b9400000 	ldr	w0, [x0]
  4013b0:	32160001 	orr	w1, w0, #0x400
  4013b4:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4013b8:	91044000 	add	x0, x0, #0x110
  4013bc:	b9000001 	str	w1, [x0]
  4013c0:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4013c4:	91044000 	add	x0, x0, #0x110
  4013c8:	b9400000 	ldr	w0, [x0]
  4013cc:	12170000 	and	w0, w0, #0x200
  4013d0:	7100001f 	cmp	w0, #0x0
  4013d4:	54000100 	b.eq	4013f4 <parse_opts+0x338>  // b.none
  4013d8:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4013dc:	91044000 	add	x0, x0, #0x110
  4013e0:	b9400000 	ldr	w0, [x0]
  4013e4:	32150001 	orr	w1, w0, #0x800
  4013e8:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4013ec:	91044000 	add	x0, x0, #0x110
  4013f0:	b9000001 	str	w1, [x0]
  4013f4:	d503201f 	nop
  4013f8:	a8c37bfd 	ldp	x29, x30, [sp], #48
  4013fc:	d65f03c0 	ret

0000000000401400 <transfer_escaped_string>:
  401400:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  401404:	910003fd 	mov	x29, sp
  401408:	b9001fa0 	str	w0, [x29, #28]
  40140c:	f9000ba1 	str	x1, [x29, #16]
  401410:	f9400ba0 	ldr	x0, [x29, #16]
  401414:	97fffd43 	bl	400920 <strlen@plt>
  401418:	f9001fa0 	str	x0, [x29, #56]
  40141c:	f9401fa0 	ldr	x0, [x29, #56]
  401420:	97fffd50 	bl	400960 <malloc@plt>
  401424:	f9001ba0 	str	x0, [x29, #48]
  401428:	f9401ba0 	ldr	x0, [x29, #48]
  40142c:	f100001f 	cmp	x0, #0x0
  401430:	54000081 	b.ne	401440 <transfer_escaped_string+0x40>  // b.any
  401434:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  401438:	91388000 	add	x0, x0, #0xe20
  40143c:	97fffdc8 	bl	400b5c <pabort>
  401440:	f9401fa0 	ldr	x0, [x29, #56]
  401444:	97fffd47 	bl	400960 <malloc@plt>
  401448:	f90017a0 	str	x0, [x29, #40]
  40144c:	f94017a0 	ldr	x0, [x29, #40]
  401450:	f100001f 	cmp	x0, #0x0
  401454:	54000081 	b.ne	401464 <transfer_escaped_string+0x64>  // b.any
  401458:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  40145c:	91390000 	add	x0, x0, #0xe40
  401460:	97fffdbf 	bl	400b5c <pabort>
  401464:	f9401fa2 	ldr	x2, [x29, #56]
  401468:	f9400ba1 	ldr	x1, [x29, #16]
  40146c:	f9401ba0 	ldr	x0, [x29, #48]
  401470:	97fffe29 	bl	400d14 <unescape>
  401474:	93407c00 	sxtw	x0, w0
  401478:	f9001fa0 	str	x0, [x29, #56]
  40147c:	f9401fa3 	ldr	x3, [x29, #56]
  401480:	f94017a2 	ldr	x2, [x29, #40]
  401484:	f9401ba1 	ldr	x1, [x29, #48]
  401488:	b9401fa0 	ldr	w0, [x29, #28]
  40148c:	97fffe62 	bl	400e14 <transfer>
  401490:	f94017a0 	ldr	x0, [x29, #40]
  401494:	97fffd57 	bl	4009f0 <free@plt>
  401498:	f9401ba0 	ldr	x0, [x29, #48]
  40149c:	97fffd55 	bl	4009f0 <free@plt>
  4014a0:	d503201f 	nop
  4014a4:	a8c47bfd 	ldp	x29, x30, [sp], #64
  4014a8:	d65f03c0 	ret

00000000004014ac <transfer_file>:
  4014ac:	a9b47bfd 	stp	x29, x30, [sp, #-192]!
  4014b0:	910003fd 	mov	x29, sp
  4014b4:	b9001fa0 	str	w0, [x29, #28]
  4014b8:	f9000ba1 	str	x1, [x29, #16]
  4014bc:	910083a0 	add	x0, x29, #0x20
  4014c0:	aa0003e1 	mov	x1, x0
  4014c4:	f9400ba0 	ldr	x0, [x29, #16]
  4014c8:	94000118 	bl	401928 <__stat>
  4014cc:	3100041f 	cmn	w0, #0x1
  4014d0:	54000081 	b.ne	4014e0 <transfer_file+0x34>  // b.any
  4014d4:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  4014d8:	91398000 	add	x0, x0, #0xe60
  4014dc:	97fffda0 	bl	400b5c <pabort>
  4014e0:	52800001 	mov	w1, #0x0                   	// #0
  4014e4:	f9400ba0 	ldr	x0, [x29, #16]
  4014e8:	97fffd22 	bl	400970 <open@plt>
  4014ec:	b900bfa0 	str	w0, [x29, #188]
  4014f0:	b9401fa0 	ldr	w0, [x29, #28]
  4014f4:	7100001f 	cmp	w0, #0x0
  4014f8:	5400008a 	b.ge	401508 <transfer_file+0x5c>  // b.tcont
  4014fc:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  401500:	9139e000 	add	x0, x0, #0xe78
  401504:	97fffd96 	bl	400b5c <pabort>
  401508:	f9402ba0 	ldr	x0, [x29, #80]
  40150c:	97fffd15 	bl	400960 <malloc@plt>
  401510:	f9005ba0 	str	x0, [x29, #176]
  401514:	f9405ba0 	ldr	x0, [x29, #176]
  401518:	f100001f 	cmp	x0, #0x0
  40151c:	54000081 	b.ne	40152c <transfer_file+0x80>  // b.any
  401520:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  401524:	91388000 	add	x0, x0, #0xe20
  401528:	97fffd8d 	bl	400b5c <pabort>
  40152c:	f9402ba0 	ldr	x0, [x29, #80]
  401530:	97fffd0c 	bl	400960 <malloc@plt>
  401534:	f90057a0 	str	x0, [x29, #168]
  401538:	f94057a0 	ldr	x0, [x29, #168]
  40153c:	f100001f 	cmp	x0, #0x0
  401540:	54000081 	b.ne	401550 <transfer_file+0xa4>  // b.any
  401544:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  401548:	91390000 	add	x0, x0, #0xe40
  40154c:	97fffd84 	bl	400b5c <pabort>
  401550:	f9402ba0 	ldr	x0, [x29, #80]
  401554:	aa0003e2 	mov	x2, x0
  401558:	f9405ba1 	ldr	x1, [x29, #176]
  40155c:	b940bfa0 	ldr	w0, [x29, #188]
  401560:	97fffd28 	bl	400a00 <read@plt>
  401564:	f90053a0 	str	x0, [x29, #160]
  401568:	f9402ba0 	ldr	x0, [x29, #80]
  40156c:	f94053a1 	ldr	x1, [x29, #160]
  401570:	eb00003f 	cmp	x1, x0
  401574:	54000080 	b.eq	401584 <transfer_file+0xd8>  // b.none
  401578:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  40157c:	913a4000 	add	x0, x0, #0xe90
  401580:	97fffd77 	bl	400b5c <pabort>
  401584:	f9402ba0 	ldr	x0, [x29, #80]
  401588:	aa0003e3 	mov	x3, x0
  40158c:	f94057a2 	ldr	x2, [x29, #168]
  401590:	f9405ba1 	ldr	x1, [x29, #176]
  401594:	b9401fa0 	ldr	w0, [x29, #28]
  401598:	97fffe1f 	bl	400e14 <transfer>
  40159c:	f94057a0 	ldr	x0, [x29, #168]
  4015a0:	97fffd14 	bl	4009f0 <free@plt>
  4015a4:	f9405ba0 	ldr	x0, [x29, #176]
  4015a8:	97fffd12 	bl	4009f0 <free@plt>
  4015ac:	b940bfa0 	ldr	w0, [x29, #188]
  4015b0:	97fffcf8 	bl	400990 <close@plt>
  4015b4:	d503201f 	nop
  4015b8:	a8cc7bfd 	ldp	x29, x30, [sp], #192
  4015bc:	d65f03c0 	ret

00000000004015c0 <main>:
  4015c0:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  4015c4:	910003fd 	mov	x29, sp
  4015c8:	b9001fa0 	str	w0, [x29, #28]
  4015cc:	f9000ba1 	str	x1, [x29, #16]
  4015d0:	b9002fbf 	str	wzr, [x29, #44]
  4015d4:	f9400ba1 	ldr	x1, [x29, #16]
  4015d8:	b9401fa0 	ldr	w0, [x29, #28]
  4015dc:	97fffeb8 	bl	4010bc <parse_opts>
  4015e0:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4015e4:	9102c000 	add	x0, x0, #0xb0
  4015e8:	f9400000 	ldr	x0, [x0]
  4015ec:	52800041 	mov	w1, #0x2                   	// #2
  4015f0:	97fffce0 	bl	400970 <open@plt>
  4015f4:	b9002ba0 	str	w0, [x29, #40]
  4015f8:	b9402ba0 	ldr	w0, [x29, #40]
  4015fc:	7100001f 	cmp	w0, #0x0
  401600:	5400008a 	b.ge	401610 <main+0x50>  // b.tcont
  401604:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  401608:	913ac000 	add	x0, x0, #0xeb0
  40160c:	97fffd54 	bl	400b5c <pabort>
  401610:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401614:	91044000 	add	x0, x0, #0x110
  401618:	aa0003e2 	mov	x2, x0
  40161c:	d28d60a1 	mov	x1, #0x6b05                	// #27397
  401620:	f2a80081 	movk	x1, #0x4004, lsl #16
  401624:	b9402ba0 	ldr	w0, [x29, #40]
  401628:	97fffd0a 	bl	400a50 <ioctl@plt>
  40162c:	b9002fa0 	str	w0, [x29, #44]
  401630:	b9402fa0 	ldr	w0, [x29, #44]
  401634:	3100041f 	cmn	w0, #0x1
  401638:	54000081 	b.ne	401648 <main+0x88>  // b.any
  40163c:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  401640:	913b2000 	add	x0, x0, #0xec8
  401644:	97fffd46 	bl	400b5c <pabort>
  401648:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  40164c:	91044000 	add	x0, x0, #0x110
  401650:	aa0003e2 	mov	x2, x0
  401654:	d28d60a1 	mov	x1, #0x6b05                	// #27397
  401658:	f2b00081 	movk	x1, #0x8004, lsl #16
  40165c:	b9402ba0 	ldr	w0, [x29, #40]
  401660:	97fffcfc 	bl	400a50 <ioctl@plt>
  401664:	b9002fa0 	str	w0, [x29, #44]
  401668:	b9402fa0 	ldr	w0, [x29, #44]
  40166c:	3100041f 	cmn	w0, #0x1
  401670:	54000081 	b.ne	401680 <main+0xc0>  // b.any
  401674:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  401678:	913b8000 	add	x0, x0, #0xee0
  40167c:	97fffd38 	bl	400b5c <pabort>
  401680:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401684:	9102e000 	add	x0, x0, #0xb8
  401688:	aa0003e2 	mov	x2, x0
  40168c:	d28d6061 	mov	x1, #0x6b03                	// #27395
  401690:	f2a80021 	movk	x1, #0x4001, lsl #16
  401694:	b9402ba0 	ldr	w0, [x29, #40]
  401698:	97fffcee 	bl	400a50 <ioctl@plt>
  40169c:	b9002fa0 	str	w0, [x29, #44]
  4016a0:	b9402fa0 	ldr	w0, [x29, #44]
  4016a4:	3100041f 	cmn	w0, #0x1
  4016a8:	54000081 	b.ne	4016b8 <main+0xf8>  // b.any
  4016ac:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  4016b0:	913be000 	add	x0, x0, #0xef8
  4016b4:	97fffd2a 	bl	400b5c <pabort>
  4016b8:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4016bc:	9102e000 	add	x0, x0, #0xb8
  4016c0:	aa0003e2 	mov	x2, x0
  4016c4:	d28d6061 	mov	x1, #0x6b03                	// #27395
  4016c8:	f2b00021 	movk	x1, #0x8001, lsl #16
  4016cc:	b9402ba0 	ldr	w0, [x29, #40]
  4016d0:	97fffce0 	bl	400a50 <ioctl@plt>
  4016d4:	b9002fa0 	str	w0, [x29, #44]
  4016d8:	b9402fa0 	ldr	w0, [x29, #44]
  4016dc:	3100041f 	cmn	w0, #0x1
  4016e0:	54000081 	b.ne	4016f0 <main+0x130>  // b.any
  4016e4:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  4016e8:	913c4000 	add	x0, x0, #0xf10
  4016ec:	97fffd1c 	bl	400b5c <pabort>
  4016f0:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4016f4:	9102f000 	add	x0, x0, #0xbc
  4016f8:	aa0003e2 	mov	x2, x0
  4016fc:	d28d6081 	mov	x1, #0x6b04                	// #27396
  401700:	f2a80081 	movk	x1, #0x4004, lsl #16
  401704:	b9402ba0 	ldr	w0, [x29, #40]
  401708:	97fffcd2 	bl	400a50 <ioctl@plt>
  40170c:	b9002fa0 	str	w0, [x29, #44]
  401710:	b9402fa0 	ldr	w0, [x29, #44]
  401714:	3100041f 	cmn	w0, #0x1
  401718:	54000081 	b.ne	401728 <main+0x168>  // b.any
  40171c:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  401720:	913ca000 	add	x0, x0, #0xf28
  401724:	97fffd0e 	bl	400b5c <pabort>
  401728:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  40172c:	9102f000 	add	x0, x0, #0xbc
  401730:	aa0003e2 	mov	x2, x0
  401734:	d28d6081 	mov	x1, #0x6b04                	// #27396
  401738:	f2b00081 	movk	x1, #0x8004, lsl #16
  40173c:	b9402ba0 	ldr	w0, [x29, #40]
  401740:	97fffcc4 	bl	400a50 <ioctl@plt>
  401744:	b9002fa0 	str	w0, [x29, #44]
  401748:	b9402fa0 	ldr	w0, [x29, #44]
  40174c:	3100041f 	cmn	w0, #0x1
  401750:	54000081 	b.ne	401760 <main+0x1a0>  // b.any
  401754:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  401758:	913d0000 	add	x0, x0, #0xf40
  40175c:	97fffd00 	bl	400b5c <pabort>
  401760:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401764:	91044000 	add	x0, x0, #0x110
  401768:	b9400001 	ldr	w1, [x0]
  40176c:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  401770:	913d6000 	add	x0, x0, #0xf58
  401774:	97fffcab 	bl	400a20 <printf@plt>
  401778:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  40177c:	9102e000 	add	x0, x0, #0xb8
  401780:	39400000 	ldrb	w0, [x0]
  401784:	2a0003e1 	mov	w1, w0
  401788:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  40178c:	913da000 	add	x0, x0, #0xf68
  401790:	97fffca4 	bl	400a20 <printf@plt>
  401794:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401798:	9102f000 	add	x0, x0, #0xbc
  40179c:	b9400003 	ldr	w3, [x0]
  4017a0:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4017a4:	9102f000 	add	x0, x0, #0xbc
  4017a8:	b9400001 	ldr	w1, [x0]
  4017ac:	5289ba60 	mov	w0, #0x4dd3                	// #19923
  4017b0:	72a20c40 	movk	w0, #0x1062, lsl #16
  4017b4:	9ba07c20 	umull	x0, w1, w0
  4017b8:	d360fc00 	lsr	x0, x0, #32
  4017bc:	53067c01 	lsr	w1, w0, #6
  4017c0:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  4017c4:	913e0000 	add	x0, x0, #0xf80
  4017c8:	2a0103e2 	mov	w2, w1
  4017cc:	2a0303e1 	mov	w1, w3
  4017d0:	97fffc94 	bl	400a20 <printf@plt>
  4017d4:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4017d8:	9104c000 	add	x0, x0, #0x130
  4017dc:	f9400000 	ldr	x0, [x0]
  4017e0:	f100001f 	cmp	x0, #0x0
  4017e4:	54000120 	b.eq	401808 <main+0x248>  // b.none
  4017e8:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  4017ec:	91046000 	add	x0, x0, #0x118
  4017f0:	f9400000 	ldr	x0, [x0]
  4017f4:	f100001f 	cmp	x0, #0x0
  4017f8:	54000080 	b.eq	401808 <main+0x248>  // b.none
  4017fc:	90000000 	adrp	x0, 401000 <transfer+0x1ec>
  401800:	913e8000 	add	x0, x0, #0xfa0
  401804:	97fffcd6 	bl	400b5c <pabort>
  401808:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  40180c:	9104c000 	add	x0, x0, #0x130
  401810:	f9400000 	ldr	x0, [x0]
  401814:	f100001f 	cmp	x0, #0x0
  401818:	54000100 	b.eq	401838 <main+0x278>  // b.none
  40181c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401820:	9104c000 	add	x0, x0, #0x130
  401824:	f9400000 	ldr	x0, [x0]
  401828:	aa0003e1 	mov	x1, x0
  40182c:	b9402ba0 	ldr	w0, [x29, #40]
  401830:	97fffef4 	bl	401400 <transfer_escaped_string>
  401834:	14000016 	b	40188c <main+0x2cc>
  401838:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  40183c:	91046000 	add	x0, x0, #0x118
  401840:	f9400000 	ldr	x0, [x0]
  401844:	f100001f 	cmp	x0, #0x0
  401848:	54000100 	b.eq	401868 <main+0x2a8>  // b.none
  40184c:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401850:	91046000 	add	x0, x0, #0x118
  401854:	f9400000 	ldr	x0, [x0]
  401858:	aa0003e1 	mov	x1, x0
  40185c:	b9402ba0 	ldr	w0, [x29, #40]
  401860:	97ffff13 	bl	4014ac <transfer_file>
  401864:	1400000a 	b	40188c <main+0x2cc>
  401868:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  40186c:	9103c001 	add	x1, x0, #0xf0
  401870:	d0000080 	adrp	x0, 413000 <strlen@GLIBC_2.17>
  401874:	91030000 	add	x0, x0, #0xc0
  401878:	d2800403 	mov	x3, #0x20                  	// #32
  40187c:	aa0103e2 	mov	x2, x1
  401880:	aa0003e1 	mov	x1, x0
  401884:	b9402ba0 	ldr	w0, [x29, #40]
  401888:	97fffd63 	bl	400e14 <transfer>
  40188c:	b9402ba0 	ldr	w0, [x29, #40]
  401890:	97fffc40 	bl	400990 <close@plt>
  401894:	b9402fa0 	ldr	w0, [x29, #44]
  401898:	a8c37bfd 	ldp	x29, x30, [sp], #48
  40189c:	d65f03c0 	ret

00000000004018a0 <__libc_csu_init>:
  4018a0:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4018a4:	910003fd 	mov	x29, sp
  4018a8:	a901d7f4 	stp	x20, x21, [sp, #24]
  4018ac:	b0000094 	adrp	x20, 412000 <__FRAME_END__+0xfd68>
  4018b0:	b0000095 	adrp	x21, 412000 <__FRAME_END__+0xfd68>
  4018b4:	91374294 	add	x20, x20, #0xdd0
  4018b8:	913722b5 	add	x21, x21, #0xdc8
  4018bc:	a902dff6 	stp	x22, x23, [sp, #40]
  4018c0:	cb150294 	sub	x20, x20, x21
  4018c4:	f9001ff8 	str	x24, [sp, #56]
  4018c8:	2a0003f6 	mov	w22, w0
  4018cc:	aa0103f7 	mov	x23, x1
  4018d0:	9343fe94 	asr	x20, x20, #3
  4018d4:	aa0203f8 	mov	x24, x2
  4018d8:	97fffc04 	bl	4008e8 <_init>
  4018dc:	b4000194 	cbz	x20, 40190c <__libc_csu_init+0x6c>
  4018e0:	f9000bb3 	str	x19, [x29, #16]
  4018e4:	d2800013 	mov	x19, #0x0                   	// #0
  4018e8:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  4018ec:	aa1803e2 	mov	x2, x24
  4018f0:	aa1703e1 	mov	x1, x23
  4018f4:	2a1603e0 	mov	w0, w22
  4018f8:	91000673 	add	x19, x19, #0x1
  4018fc:	d63f0060 	blr	x3
  401900:	eb13029f 	cmp	x20, x19
  401904:	54ffff21 	b.ne	4018e8 <__libc_csu_init+0x48>  // b.any
  401908:	f9400bb3 	ldr	x19, [x29, #16]
  40190c:	a941d7f4 	ldp	x20, x21, [sp, #24]
  401910:	a942dff6 	ldp	x22, x23, [sp, #40]
  401914:	f9401ff8 	ldr	x24, [sp, #56]
  401918:	a8c47bfd 	ldp	x29, x30, [sp], #64
  40191c:	d65f03c0 	ret

0000000000401920 <__libc_csu_fini>:
  401920:	d65f03c0 	ret
  401924:	00000000 	.inst	0x00000000 ; undefined

0000000000401928 <__stat>:
  401928:	aa0103e2 	mov	x2, x1
  40192c:	aa0003e1 	mov	x1, x0
  401930:	52800000 	mov	w0, #0x0                   	// #0
  401934:	17fffc43 	b	400a40 <__xstat@plt>

Disassembly of section .fini:

0000000000401938 <_fini>:
  401938:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  40193c:	910003fd 	mov	x29, sp
  401940:	a8c17bfd 	ldp	x29, x30, [sp], #16
  401944:	d65f03c0 	ret
